Data caches in general-purpose microprocessors typically contain “dead” blocks that may be identified, marked for eviction, and subsequently evicted. Traditionally, a cache line that will be referenced again before eviction from the cache is called a “live” block; otherwise, it is called a “dead” block. Cache efficiency may be improved if “dead” blocks are accurately identified and evicted early, since inaccurate and/or late predictions may increase the cache-miss rate and have an adverse impact on system performance. Existing methods of dead block prediction predict the death of a cache block immediately after it is accessed, and can lack both accuracy and efficiency.